STM32 Alternatives: GD32, APM32, AT32, CH32

Four Chinese microcontroller families are widely used in place of STM32 parts: GigaDevice GD32, Geehy APM32, Artery AT32 and WCH CH32. On the Cortex-M parts among them, pinouts and register addresses closely follow the STM32 part they replace, so the board usually stays the same. The firmware usually does not. The vendors' own documents list differences in flash wait states, oscillator start-up, flash programming, USB and power consumption, and some ST tools refuse to work with non-ST chips. WCH's CH32V parts share STM32 footprints but use a RISC-V core, so they need a full port, not a recompile.

Treat any of these parts as an alternate that needs qualification, not a drop-in: rebuild with the vendor's headers, retest clocks, flash writes, USB and low-power modes, and check the electrical limits, which differ more than most comparisons admit. None of these vendors promises that unmodified STM32 binaries will run, and in the documents we checked none of them names ST at all: Artery's migration guides refer to "SXX32" parts.

We source both STM32 parts and these alternatives in Shenzhen. Below is what the datasheets and application notes actually say, as of October 2026.

Which part replaces which

Family	Usually replaces	Core	Max clock	Supply (VDD)	What to know first
GigaDevice GD32F103	STM32F103	Cortex-M3	108 MHz	2.6-3.6 V	Zero-wait flash only in the first 256 KB
GD32F303	STM32F103 high-density	Cortex-M4F	120 MHz	2.6-3.6 V	USB can run without a crystal
GD32F405/407	STM32F405/407	Cortex-M4F	168 MHz	2.6-3.6 V	Zero-wait code area 512 KB
GD32E230	STM32F030-class	Cortex-M23	72 MHz	1.8-3.6 V	Different core from the F030's M0
Geehy APM32F103	STM32F103	Cortex-M3	96 MHz	2.0-3.6 V	Same supply range as the STM32F103
APM32F030 / F072	STM32F030 / F072	Cortex-M0+	48 MHz	2.0-3.6 V	F072 has crystal-less USB
APM32F405/407	STM32F405/407	Cortex-M4F	168 MHz	1.8-3.6 V	Early silicon has an NVIC erratum
Artery AT32F403A	STM32F103 (per Artery's guide)	Cortex-M4F	240 MHz	2.6-3.6 V	Internal USB pull-up; longer start-up
AT32F413	STM32F103 C8 to RC	Cortex-M4F	200 MHz	2.6-3.6 V
AT32F421	STM32F030	Cortex-M4, no FPU	120 MHz	2.4-3.6 V	Two LQFP48 power pins differ
AT32F435/437	STM32F4-class	Cortex-M4F	288 MHz	2.6-3.6 V	STM32F4 VCAP pins are GPIO here
WCH CH32F103	STM32F103C8/R8 footprint	Cortex-M3	72 MHz	2.7-5.5 V	SWD only, no JTAG
WCH CH32V203	STM32F103-class footprint	RISC-V (QingKe V4B)	144 MHz	2.4-3.6 V	Not binary-compatible
WCH CH32V303/305/307	STM32F105/107-class	RISC-V (QingKe V4F)	144 MHz	2.4-3.6 V	Not binary-compatible

For reference, the STM32F103 is a 72 MHz Cortex-M3 that runs from 2.0-3.6 V. The "usually replaces" column follows pinouts and memory maps; only Artery publishes part-to-part migration guides. Sources: GigaDevice datasheets, Geehy product pages, Artery datasheets and cross-reference table, WCH datasheets.

Two entries worth correcting from the internet: there is no "GD32F030" (GigaDevice's small parts are the GD32F1x0 and GD32E230), and the AT32F403A runs at 240 MHz, not 288 MHz. 288 MHz is the AT32F435/437.

Flash: zero-wait regions and slower programming

This is where most performance surprises come from.

Zero-wait execution covers only part of the flash. On the GD32F103 only the first 256 KB "code area" runs without wait states; GigaDevice's datasheet warns of long fetch delays beyond it. The GD32F4xx code area is 512 KB. Die photos published by Zeptobars show why: the GD32F103 carries a separate serial-flash die next to the MCU die (Zeptobars).
Artery quantifies the penalty. On the AT32F403A, code in the non-zero-wait area runs at about 0.4 times zero-wait speed, so a 240 MHz part behaves like roughly 96 MHz there (Artery FAQ0069). Selecting the larger 224 KB SRAM option in the user system data shrinks the zero-wait flash to 128 KB.
WCH works the same way. On CH32V203 and CH32V30x only the zero-wait region runs at full speed, and the flash clock is limited to 60 MHz.
Programming and erase take longer. GD32F103: page erase 50 ms typical (400 ms maximum) and mass erase 2.4 s typical for 128 KB, against 20-40 ms for the STM32F103 (GD32F103 datasheet, STM32F103 datasheet). AT32F403A mass erase: 0.8-2.8 s against 40 ms (Artery MG0007). Bootloaders and EEPROM emulation with tight timeouts break first.
Page sizes and option bytes differ. GD32 pages are 1 KB on parts up to 128 KB, 2 KB in the first 512 KB of larger parts and 4 KB above that. The AT32F403A user system data area is 48 bytes against 16 on the STM32F103.

What to do: keep time-critical code and interrupt handlers inside the zero-wait region (check the linker map), and retest every flash write, erase and bootloader timeout.

Clocks and start-up

The HSE start-up timeout is the classic "it doesn't start" bug. ST's default HSE_STARTUP_TIMEOUT is 0x0500. GigaDevice's software migration guide AN001 says to change it to 0xFFFF (GD AN001). Geehy's APM32F103 errata say 0x0500 may time out and recommend at least 0x3200 (Geehy errata). Artery's own firmware library uses 0x3000.
Start-up takes longer. The GD32F103 needs 9-68 ms typical from reset to main for a 16-128 KB code area, and 125 ms at 256 KB. The AT32F403A needs 13 ms against 2.5 ms for the STM32F103, and wakes from Standby in 8 ms against 50 µs. Anything that must respond quickly after reset or wake-up needs rechecking.
Wait states. APM32F103 flash latency is 0/1/2/3 wait states at up to 24/48/72/96 MHz, set the familiar way. GigaDevice's own documents disagree on GD32F303 latency, so measure.

USB

USB is where the board may need to change after all.

Part	USB clock	D+ pull-up
STM32F103	HSE crystal + PLL	External 1.5 kΩ
GD32F103	HSE crystal + PLL	Check the datasheet
GD32F303	Can run crystal-less (IRC48M + CTC)	Check the datasheet
APM32F103	HSE crystal + PLL	External 1.5 kΩ
APM32F072	Crystal-less (CRS)	Check the datasheet
AT32F403A	Crystal-less from the 48 MHz HICK, trimmed against USB SOF	Internal: omit the external 1.5 kΩ
CH32V203 / V30x	Check the datasheet	Internal 1.5 kΩ

An STM32F103 board with an external 1.5 kΩ pull-up on D+ gets a second, internal one when an AT32F403A or CH32V goes in, so the external resistor should come off. The AT32F403A also only supports USB clock prescalers of /2 to /4 (Artery MG0007).

Power and electrical limits

Minimum supply. GD32F1/F3 and AT32F403A need at least 2.6 V; the STM32F103 works from 2.0 V. A design that runs from a sagging battery or a 2.5 V rail can't use them. The APM32F103 matches the STM32F103's 2.0-3.6 V.
Absolute maximum. The GD32F103 is rated to 3.6 V absolute maximum, against 4.0 V for the STM32F103. Supply transients that an STM32 survives may not be safe.
Low-power current. This is the largest documented difference:

Mode (3.3 V)	STM32F103	GD32F103	AT32F403A
Stop / Deep-sleep	14-24 µA	247-259 µA	1.4 mA (25 µA for the STM32F103 in Artery's comparison)
Standby	2.0-3.4 µA	6.1-7.8 µA	5.7 µA (2.1 µA for the STM32F103 in Artery's comparison)
VBAT domain	1.4 µA	12.65 µA	Not compared

Sources: GD32F103 and STM32F103 datasheets, Artery MG0007. For battery-powered products this alone can rule a swap out.

Other analog details. On the AT32F403A the internal temperature sensor has a positive slope where the STM32's is negative, the ADC runs at 2 Msps, and BOOT0 has a fixed pull-down of about 90 kΩ.

Pins that are not the same

"Pin-compatible" holds for most packages, not all:

AT32F421 in LQFP48: pins 35 and 36 are PF6/PF7, where the STM32F030CC has VSS/VDD (Artery MG0016). The I2C and ADC interfaces also differ.
AT32F435/437: the pins that are VCAP_1 and VCAP_2 on the STM32F405/407 are GPIO (PH3/PH2).
CH32F103: SWD only. A board that uses JTAG needs rework.

Debug tools and libraries

Keil's STM32F1 device pack rejects non-ST chips. Keil.STM32F1xx_DFP checks the device ID and stops with "Not a genuine ST Device!". Geehy's errata advise using Geehy's pack or commenting the check out (Keil pack description).
ST's own debug server can refuse them. Users report STM32CubeIDE's ST-LINK GDB server stopping with "Could not verify ST device!" on clone chips, while OpenOCD worked (ST community). We found no ST statement that non-ST targets are supported.
Device IDs differ. The APM32F1 reports JTAG/SWD IDs 0x4ba00477/0x2ba01477, against 0x3ba00477/0x1ba01477 for the STM32F1, so OpenOCD's STM32F1 configuration fails its ID check. GD32F1x0 parts reuse the STM32 device ID 0x410 with different revision IDs.
Use the vendor's tools. Each vendor ships Keil/IAR packs and its own probe: GD-Link, Geehy-Link, AT-Link and WCH-Link. CH32V parts debug over WCH's two-wire SDI interface, not SWD, and need WCH-Link. OpenOCD's last numbered release, 0.12.0 (January 2023), predates its Geehy and Artery support, which exists only in the development branch; CH32 support lives in WCH's fork (OpenOCD).
Libraries are not interchangeable. Vendor libraries rename peripherals: GigaDevice uses RCU, FMC, TIMER0 and USART0; Geehy uses RCM, TMR and EINT; Artery uses crm_ and tmr_ prefixes; WCH copies ST's old SPL names.
Check the licence on ST middleware. The STM32CubeF1 HAL and LL drivers are BSD-3-Clause. ST's USB Device and Host libraries and STemWin are under ST's SLA0044 licence, which limits their use to ST devices (STM32CubeF1 licence, USB Device licence). A product that moves to a GD32 or AT32 and keeps ST's USB stack has a licensing problem.

CH32V is a port, not a swap

The CH32V203 and CH32V30x fit STM32-class footprints, but their QingKe cores are RISC-V. Cortex-M binaries can't run on them. A port needs a RISC-V toolchain, a vector table set up through mtvec, WCH's PFIC interrupt controller in place of the NVIC, and different interrupt numbers (WWDG_IRQn is 16, not 0). WCH's "WCH-Interrupt-fast" attribute is rejected by upstream GCC, so use WCH's toolchain or rewrite the handlers (QingKe V4 manual, GCC RISC-V attributes).

Errata and silicon revisions

Read the errata sheet of the exact part and revision. One example: early APM32F407 silicon (A2/A3) implements only three NVIC priority bits, eight levels against the STM32F407's sixteen; revisions C1/C2 fix it (Geehy errata).

Migration checklist

Compare the exact package pinout, not just the family: watch the AT32F421 LQFP48 power pins, the AT32F435 VCAP pins and the USB D+ pull-up.
Check the supply range and absolute maximum ratings against your power rails: a 2.6 V minimum rules out some designs.
Rebuild with the vendor's startup files and headers, raise HSE_STARTUP_TIMEOUT, and set flash wait states and the clock tree for the new part.
Keep hot code in the zero-wait flash region and confirm it in the linker map.
Retest flash programming: page sizes, erase times, option bytes and bootloader timeouts.
Retest USB: pull-up, clock source, prescaler.
Measure low-power current in every mode your product uses.
Recalibrate the ADC and the temperature sensor.
Set up debugging with the vendor's pack and probe, or a current OpenOCD build.
Replace ST middleware licensed for ST devices only.
Qualify across temperature, run long-duration tests, and record the silicon revision you qualified.

Sourcing

Pin-compatible alternatives are one of the main ways out of an STM32 shortage or end-of-life notice; our EOL management guide covers the wider strategy. When you consider a swap, order samples for qualification before production quantities, and list the alternate in your BOM as a separate approved line, not in the same field as the original part number; our BOM guide shows the format.

We supply STM32 parts and their alternatives from Shenzhen, help with cross-referencing, and can ship samples for your qualification. Send an RFQ with the part number you need to replace.

FAQ

Is GD32 a drop-in replacement for STM32?

For the board, usually; for the firmware, no. Most GD32F1/F3 packages match STM32 pinouts, but GigaDevice's own migration guide requires firmware changes such as a longer HSE start-up timeout and GigaDevice's flash algorithm. GD32 parts also need at least 2.6 V, have zero-wait flash only in the first 256 KB, and draw much more current in deep-sleep.

Which alternative is closest to the STM32F103?

On paper, the Geehy APM32F103: the same Cortex-M3 core and the same 2.0-3.6 V supply, at up to 96 MHz. Geehy's errata still require a longer HSE start-up timeout. The GD32F103 is faster (108 MHz) but needs 2.6 V. The AT32F403A is much faster (240 MHz, Cortex-M4F) but differs more: internal USB pull-up, longer start-up, higher sleep current.

Can I program a GD32 or AT32 with an ST-LINK?

The SWD hardware works with tools such as OpenOCD, but Keil's STM32 device pack refuses non-ST chips, and STM32CubeIDE's ST-LINK server has been reported to refuse them too. Use the vendor's Keil pack and probe (GD-Link, AT-Link) or a recent OpenOCD build.

Will STM32 HAL code run on these chips?

It can be compiled, since the STM32CubeF1 HAL is BSD-licensed, but no vendor guarantees it runs unchanged, and you will have to adjust at least clocks, start-up timeouts and flash settings. ST's USB middleware is licensed for ST devices only.

Is the CH32V203 compatible with the STM32F103?

It fits an STM32F103-class footprint, but it has a RISC-V core, so STM32 firmware has to be ported to a new toolchain, interrupt controller and debug interface. The WCH CH32F103 is the Cortex-M3 option from WCH.

Are these chips reliable enough for production?

Reliability is something you qualify, not assume. Test samples across your temperature range and operating modes, read the errata for the exact silicon revision, and keep the qualified revision on record.

STM32 Pin-Compatible Alternatives: GD32, APM32, AT32 and CH32 Compared